ATF 10136 PDF

Download [ The ATF device is capable of a 0. The ATF is packaged in a low cost mil micro-x package. To achieve the lowest possible noise figure that the device is capable of producing, the input matching structure must transform the system impedance, usually 50 ohms, to an impedance represented by GO. GO is the source reflection coefficient that must be presented to the device for it to yield the rated noise figure. This is in contrast to presenting to the device the complex conjugate of S11 which will match the device for maximum gain and minimum input VSWR.

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Download [ The ATF device is capable of a 0. The ATF is packaged in a low cost mil micro-x package. To achieve the lowest possible noise figure that the device is capable of producing, the input matching structure must transform the system impedance, usually 50 ohms, to an impedance represented by GO. GO is the source reflection coefficient that must be presented to the device for it to yield the rated noise figure. This is in contrast to presenting to the device the complex conjugate of S11 which will match the device for maximum gain and minimum input VSWR.

One matching solution is to use a series quarterwave transmission line to match the real part and a reactive component to match the imaginary part of the reflection coefficient. A quarterwave transmission line of the appropriate characteristic impedance Zo will match two impedances over a narrow bandwidth. The following is the formula for calculating the required characteristic impedance: A transmission line of characteristic impedance of 44 ohms transforms the 50 ohm source impedance to 39 ohms.

This is plotted as Point A on Figure 1. At this point, it is still the resistive axis. An inductor of this size is often difficult to build; and more difficult to tune during the initial breadboard stage of design. A Zo GO Figure 1. Smith Chart Shows Input Match 2 a series inductive reactance can be simulated by an equivalent shunt capacitive reactance when it is physically spaced a quarter wavelength away on the transmission line. Using the Smith Chart, it can be shown that the equivalent shunt component can be calculated from the following formula: For a 5 nH inductor, Xc calculates to be Shown in Figure 2 are the resultant input matching networks.

The LNA design will be based on the network with the shunt capacitive element. This accounts for the imperfect isolation through the FET. A Smith Chart exercise similar to that used to generate the input network yields the circuits shown in Figure 3 for the output network. Computer Optimization The initial design can be performed quite easily with a basic understanding of the Smith Chart.

It provides a basis with which to begin optimization. With the help of a computer, modeling and optimizing the basic matching networks for a desired performance is attainable. One of the main advantages of a computer optimization program is the ability to model the electrical effects associated with the actual circuit realization of the LNA.

Examples include the discontinuity associated with soldering the 0. These small yet often significant discontinuities are often tedious to model on the Smith Chart, but are a trivial matter for the computer.

Input Matching Networks 1. Although an LNA design may be unconditionally stable at the operating frequency, there will be no guarantee that the LNA will not oscillate at some other frequency unless a stability analysis is performed. The analysis should be performed at all frequencies over which the device has gain.

An out-of-band oscillation could possibly be at a large enough amplitude to cause a reduction in in-band gain or an increase in noise figure. Although it is not necessary that an LNA be unconditionally stable at all frequencies, stability should be analyzed so that the areas of potential instability can be evaluated and problem source and load impedances can be avoided.

The revised circuit after optimization is shown in Figure 4. The input matching network consists of microstriplines Z1 and Z2. It was later found empirically and confirmed on the computer that adding an additional stub Z3 reduces the noise figure slightly. The blocking capacitors were chosen to be 10 pF to offer some low frequency rejection. Quarterwave lines are utilized for bias decoupling.

Both pF and 0. It was also determined with the help of the computer that using a quarterwave open circuited low impedance line in the gate bias decoupling circuit as opposed to using a bypass capacitor also improved stability near the band of operation. Figure 4. Both the S parameters and Noise parameters of the device are characterized in fixtures that provide a near perfect ground at both source leads.

In actual circuits, it is usually impossible to ground the sources right at the package. The situation is further compounded if self biasing is used and the source leads are bypassed to ground with capacitors. Generally the source leads are laid down on a path of etch and only reach the bottom side groundplane via plated through holes. The effect of this source inductance can be easily analyzed with the computer. The seemingly small source leads and vias do add a significant amount of inductance to the circuit.

Fortunately some amount of inductance actually helps to minimize input VSWR when the device is purposely mismatched for low noise operation. Consult Reference 1 for additional information on the effect of source inductance on LNA operation. It is strongly suggested that all source leads be DC grounded for best overall performance above 2 GHz.

The source leads are modeled as microstriplines 0. The most dominant effect of adding source inductance is that input VSWR is improved significantly. In the common source configuration, inductance in series with the source adds negative feedback which has the effect of increasing the real part of the device input impedance.

Source feedback also has the effect of taking a device that is not unconditionally stable and making the circuit it is used in stable at the frequency of operation. Generally, as source inductance is increased, stability at and below the frequency of operation is improved.

Adding an excessive amount of inductance tends to make the amplifier unstable at frequencies higher than the normal operating frequency. There exists an optimum amount of source inductance for a particular device and circuit topology. For the ATF at 2. Bias Circuitry The preferred technique for biasing LNAs is using active biasing versus passive biasing.

The active bias network automatically sets Vgs for the desired drain voltage and drain current. The typical active biasing scheme for FETs requires that the source leads be grounded and an additional supply used to generate the negative voltage required at the gate for typical operation.

Directly grounding the FET source leads has the additional advantage of not requiring bypass capacitors to bypass a source resistor that would typically be used for self biasing in a single supply circuit. The parasitic inductance associated with the bypass capacitors often creates stability problems either inband or at higher frequencies. A simpler approach is to use one of the newer integrated DC-DC converters.

The drain voltage is determined by resistors R2 and R3 shown in Figure 4. Resistor R1 sets the drain current. The typical bias point for low noise operation for the ATF is shown in Table 1. Suggested resistor values for the active bias networks are also shown.

Measured performance of several LNAs as compared to the computer simulation is within a tenth of a dB on noise figure and within a dB on gain. Reference: 1. TouchstoneTM Circuit Configuration.

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